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Number of items: 3. Harutyunyan, G. E. (2018) An Approach for Scheduling Parallel and Serial Testing of Embedded IP Cores in Nanoscale SoCs. ՀՀ ԳԱԱ Զեկույցներ, 118 (1). pp. 26-32. ISSN 0321-1339 Harutyunyan, G. E. and Shoukourian, S. K. and Zorian, Y. A. (2012) Fault and Test Algorithm Periodicity Hypothesis in Memory Devices and Its Application to Memory BIST Processor Architecture. ՀՀ ԳԱԱ Զեկույցներ, 112 (3). pp. 229-238. ISSN 0321-1339 Avetisyan, H. S. and Harutyunyan, G. E. and Vardanian, V. A. (2010) Minimal March Test Algorithms for Detection of All Realistic Two-Operation, Two-Cell Dynamic Faults from Subclasses S av and S va. ՀՀ ԳԱԱ Զեկույցներ, 110 (2). pp. 143-150. ISSN 0321-1339 |